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Training modern deep neural networks for memory-fault robustness

G. B. Hacene, F. Leduc-Primeau, A. B. Soussia, V. Gripon and F. Gagnon, "Training modern deep neural networks for memory-fault robustness," in Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 1--5, May 2019.

Because deep neural networks (DNNs) rely on a large number of parameters and computations, their implementation in energy-constrained systems is challenging. In this paper, we investigate the solution of reducing the supply voltage of the memories used in the system, which results in bit-cell faults. We explore the robustness of state-of-the-art DNN architectures towards such defects and propose a regularizer meant to mitigate their effects on accuracy. Our experiments clearly demonstrate the interest of operating the system in a faulty regime to save energy without reducing accuracy.


Bibtex
@inproceedings{HacLedSouGriGag20195,
  author = {Ghouthi Boukli Hacene and François
Leduc-Primeau and Amal Ben Soussia and Vincent Gripon
and François Gagnon},
  title = {Training modern deep neural networks for
memory-fault robustness},
  booktitle = {Proceedings of the IEEE International
Symposium on Circuits and Systems},
  year = {2019},
  pages = {1--5},
  month = {May},
}




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